TECHNOLOGY

Packaging

Overview

Optical I/O Core consists of a Si photonic integrated circuit and substrate, on which ICs and LDs are mounted, and optical coupling structures called optical pins, which allow optical fibers to be connected to the chip robustly and with low loss. Optical pins are vertical optical waveguides made of resin and fabricated using photolithographic processes. The LD is positioned and mounted with high precision using passive alignment structures. Assembly is carried out by proprietary automated processes and equipment.

Optical fibers are not connected directly to the Si photonic substrate, but to the optical pins on a separate higher interface, which allows for a more robust and lower cost connection.
There is no need to secure an area for mounting optical fibers directly to the chip surface, thus contributing to the further miniaturization of Si photonic chips.

Packaging

High Temperature operation

One of the key features of the Optical I/O Core is the optical pin structure, which couples light from the I/O Core transmitters to the multimode fiber (MMF) interface, and from the MMF interface to receivers in the I/O Core.

Variations in transmitter temperature give rise to shifts in the LD wavelength, which in turn cause changes in the angle of emission through the grating couplers. The optical pins on the transmitter side are designed to confine the light emitted from the grating couplers in their cores, even when the emission angle varies. This allows stable optical connections to be maintained even at temperatures exceeding 100 °C or higher.
The optical pins on the receiver side are tapered to efficiently capture the light from the larger multimode fiber core, and guide and compress it into the smaller active area of the photodetector.

The optical pins are largely temperature independent with a misalignment tolerance higher than ± 10 µm to mount the MMF array, which is over an order of magnitude higher than competing silicon photonics chips. The increased misalignment tolerance of the optical interface allows for a low-loss optical connection to be maintained over a longer time and under harsher conditions, thus substantially increasing the reliability of the critical optical connection.

Packaging

Cost efficiency

The Optical I/O Core batch assembly process divides the Si photonics wafer into 4 x 4 (total of 16 pcs) tiles with components assembled on a tile-by-tile basis. The LDs are mounted into their I/O Core tiles through an automated alignment process using passive alignment features patterned both on the Si photonic chip and the LD. Using conventional pick-and-place techniques and equipment, this gives rise to a positional accuracy of 0.5 µm or less.
The optical pins are formed photolithographically on the 16 Optical I/O Core tiles using an automatic exposure machine with ordinary lenses, thus low cost and high productivity can be achieved.
Finally we are developing an automated assembly machine, that can mount optical fibers passively onto the Optical I/O Core. Passive automated alignment is made possible by the increased misalignment tolerance afforded by the optical pins and the MMFs. Further cost reduction is thus achieved, compared to competing single mode devices in the market, by using lower cost, lower precision MMF components instead of higher precision single mode fibers (SMF) and associated components.
If you would like to build a custom module, we can help you take advantage of this passive optical connector.

Packaging

Packaging

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